An analog-to-digital converter is widely used for digitizing an analog signal, and is mainly used in a configuration of a semiconductor integrated circuit. Along with the development of manufacturing technique and microfabrication of semiconductor integrated circuit, a reduction in power supply voltage, an enhancement of speed, and an improvement of power efficiency are in progress. In a high-speed analog-to-digital converter, there is a problem that a noise generated when a switch included in the analog-to-digital converter is switched at high speed causes a variation in an electric potential of a node of power supply voltage or an electric potential of another node, resulting in that a conversion performance of the analog-to-digital converter itself is deteriorated.
A power supply circuit in an integrated circuit chip having a plurality of operating frequency modes in which a resonance point determined by a resistance, an inductance, and a capacitance parasitic on a power supply system is changed in accordance with an operating frequency signal, has been known (refer to Patent Document 1, for example).
Further, there has been known a semiconductor integrated circuit having a circuit executing predetermined processing, and a switch circuit switching a source impedance, in which the switch circuit switches the source impedance to make a resonance frequency of the semiconductor integrated circuit to be deviated from an operating frequency of the circuit in accordance with a variation in electric potential applied to the circuit (refer to Patent Document 2, for example).
[Patent Document 1] Japanese Laid-open Patent Publication No. 11-7330
[Patent Document 2] Japanese Laid-open Patent Publication No. 2009-94133